China Regular Gate Drive Transformer Manufacturer

In general inverter, switching power supply, motor drive and other applications, more than 2 mosfets or IGBTs are required to form a bridge connection, among which the one close to the power supply terminal (such as the red part in the figure) is usually called the high voltage side or the upper arm, and the one close to the ground terminal It is usually called the low-voltage side or the lower arm (such as the blue part in the figure), and the high and low are only distinguished by the different positions and voltage values of the two.

If you use the method of driving a single mosfet to drive the power tube on the high-voltage side, when you need to turn off the lower arm, then basically the arm cannot be turned on, so the driving voltage values ​​of the upper arm and the lower arm are different, and the upper arm should be slightly higher. on the lower arm.

The traditional method is generally to drive multiple power sources or build a bootstrap boost circuit. However, there are problems of too many devices and low reliability, and after there are too many devices, the distribution of parameters, wiring, and electromagnetic interference in high-frequency applications are all problems.

In this post, we'll discuss more details of the actual implementation of these two approaches, including their pros and cons.

Figure 1 shows a practical implementation of a gate drive transformer for a half-bridge MOSFET configuration. The half-bridge topology is widely used in power converters and motor drives. This is largely due to the half-bridge's ability to provide efficient synchronous control of pulse-width modulated (PWM) signals via the bus voltage. However, gate drivers are often required between the controller and power devices to achieve faster switching times and to provide isolation for safety and/or functional purposes. For systems where the bus voltage is higher than the maximum gate-to-source voltage limit of the power switch, the gate must be driven with a different voltage than the system bus.

For higher power systems, the power switching devices account for a significant portion of the BOM cost, and N-type devices typically have lower on-resistance than P-type devices of the same size and cost1. Additionally, designing around timing requirements, such as non-overlap and dead time, can be simplified by using two identical switches on a single pin in a half-bridge configuration. For these reasons, a half-bridge configuration usually consists of two N-type devices, which can be NPNBJTs, NMOS devices, or N-type IGBTs. For simplicity, the half-bridge configuration in this article uses two NMOS devices, one for each pin; the same concept applies to IGBTs. In order to use BJT devices, constant base current must be considered in the design.

In order to obtain a clean and stable gate drive signal on the MOSFET, additional components are required, these additional components are:

C B : DC blocking capacitor used to prevent saturation of the gate drive transformer.

D 1, D 2: Prevent symmetrical negative voltage bias and save gate drive loss.

· Q 1 , Q 2 : Low-voltage P-MOS or PNP transistors to improve gate drive turn-off performance.

Z 1 , Z 2 : Zener diodes that help protect the gate/source of the power MOSFET from overvoltage.

Detailed Implementation of Gate Drive Transformer and High and Low Side Drivers

Figure 1: Practical implementation of a gate drive transformer considering parasitics

Obviously, additional components will definitely add complexity to the gate drive transformer design. Leakage inductance can also impair gate drive transformer performance, including reduced peak gate drive current and larger overshoot (caused by leakage inductance and MOSFET junction capacitance). In practice, increasing the peak drive current requires increasing the core size and winding wire thickness to facilitate higher drive speeds; however, the corresponding effect will be higher overshoot due to higher energy stored in leakage inductance. The bifilar winding of the gate drive transformer helps reduce leakage inductance; however, at the expense of increased primary-to-secondary coupling leakage capacitance C IO . The first is one of the main parasitic parameters that limit common-mode transient immunity (CMTI) performance (see my blog post "48V Systems: Driving Power MOSFETs Efficiently and Robustly" for an explanation). All that said, it's really hard to make a better trade-off considering the above factors.

Figure 2 shows a practical implementation of a high-side and low-side gate driver solution with digital isolators. Compared to Figure 2b in my previous post, I've only added a few major components: R Boot and a 5V LDO for V Bias between 10 to 20V and the secondary side of the isolator which needs 3 to 5V Provide power interface low voltage/power supply between.

Because there are no issues related to transformer leakage inductance compared to gate drive transformers, you can achieve a better tradeoff between gate drive current, overshoot, CMTI, etc.

Detailed Implementation of Gate Drive Transformer and High and Low Side Drivers

Figure 2: Practical implementation of high-side and low-side gate drivers

Table 1 compares the two methods. High/Low side gate drivers do "win" from the point of view of fewer auxiliary components, small parasitic inductance/C IO, smaller overshoot and PCB size, and flexible peak gate drive current. Regarding the isolated bias supply, as I mentioned earlier, the high-side/low-side gate drivers can utilize the existing off-line isolated power supply subsystem.

Detailed Implementation of Gate Drive Transformer and High and Low Side Drivers

Table 1: Comparison of Gate Drive Transformers and High/Low Side Gate Drivers